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"The Technology and Design of Gigabit Interconnects for Network and Communication Systems"

See also:
Surface Mount Backplane Connector...
Semiconductor Package Power...
Case Study of Cisco Package Redesign...
Case Study of Package Power...
DDR-II SDRAM Technology...
Infiniband Cable Equalizer...
Motorola WarpLink Reference Design...
OC-48/2.5 Gbps Design Rules...
The limits of FR-4...
SI & Validation of BLVDS...
->Gigabit Interconnects...
Design of Gigabit Copper Fibre Channel...
GTL+ Backplane Termination...
GHz Differential Connector ...
Timing of SDRAM Design...
Transmission Line Skin Effects...
MCM Compute Node Thermal Failure...
QuickRing Backplane System
Bussed Clock Architectures for ATM...
Simplifying FutureBus Backplane...
Infiniband and the limits...
SI Solutions for GTLP...
A Baker's Dozen...

 

Presented at the Analog and Mixed-Signal Applications Conference - July 1998

Dr. Edward P. Sayre, P.E.
Mr. Michael Baxter
Dr. Jinhua Chen

Abstract

The paper will deal with a technology survey useful in the design of Gigabit interconnect systems. It will discuss the theoretical and practical conditions that should be considered in the specification and design of PCB etch and measuring and evaluating PHY (SERDES) Gigabit transceiver devices. The paper also considers the problems with specifying and insuring performance of connector systems that are critical to SONET and Fibre Gigabit interconnects. Lastly, the paper discusses the benefits and design of equalized differential Fibre Channel copper cabling.

Each of the major technologies are investigated with experimental data illustrating eye-diagram performance, voltage vs. time of the digital signal as well as the equivalent SPICE analog network simulations. By taking a fundamental engineering approach to the problems of designing in the Gigabit regime, it is possible to separate physical effects such as skin effect losses, dielectric losses, reflection effects, AC and DC terminations for differential systems. Examination of skew between pairs permits an assessment of the EMI potential of Gigabit transmissions, especially over long cables (>20 meters)..

Command of these technologies is the major risk reducing elements in the design of Gigabit links. Investigations based on the fundamentals offer the designer a thorough understanding of the design trade-offs built on analog and microwave simulation principles. The system signal integrity engineer can, with the proper knowledge base and tools, predict the performance and avoid the pitfalls in Gigabit system design.

->This paper is available from NESA for $15.00 to cover management costs. We accept credit card payment for purchase of the papers. The requested paper will be emailed to you shortly after your order is received.

 

 

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