"Infiniband and the limits of FR-4"

See also: Surface Mount Backplane Connector... Semiconductor Package Power... Case Study of Cisco Package Redesign... Case Study of Package Power... DDR-II SDRAM Technology... Infiniband Cable Equalizer... Motorola WarpLink Reference Design... OC-48/2.5 Gbps Design Rules... The limits of FR-4... SI & Validation of BLVDS... Gigabit Interconnects... Design of Gigabit Copper Fibre Channel... GTL+ Backplane Termination... GHz Differential Connector ... Timing of SDRAM Design... Transmission Line Skin Effects... MCM Compute Node Thermal Failure... QuickRing Backplane System Bussed Clock Architectures for ATM... Simplifying FutureBus Backplane... ->Infiniband and the limits... SI Solutions for GTLP... A Baker's Dozen...

Abstract This presentation will present some of the developmental results of a candidate Future I/O (FIO) connector system developed by Fujitsu Takamisawa Components Limited in Japan and their sister company Fujitsu Takamisawa of America (FTA). The talk will focus on the validation of the FIO "Passive Backplane, Option 2" cable interface requirements and what they mean to system I/O designers and chip manufacturers. Results will be shown showing the correlation of SPICE simulation modeling results to equivalent characterization measurement data. The creation and validation of FIO "Passive Backplane, Option 2" cable and connector SPICE models is an important step for system designers. These validated SPICE permit the performance of the FIO interconnects to be simulated and performance analyzed using realistic Gigabit device driver and receiver models communicating at Gigabit rates over the FIO connectors and PCB interconnects. This presentation will summarize only a small fraction of the work being pushed forward to create bandwidth at affordable prices and predictable performance. With the standardization of the System I/O technology, the previously difficult arena of Gigabit I/O interconnect design will be replaced by the next millennium System I/O "plug and play" interconnect technology ->This paper is available from NESA for $15.00 to cover management costs. We accept credit card payment for purchase of the papers. The requested paper will be emailed to you shortly after your order is received.

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