"A Baker's Dozen of High-Speed Differential Backplane Design Tips"

See also: Surface Mount Backplane Connector... Semiconductor Package Power... Case Study of Cisco Package Redesign... Case Study of Package Power... DDR-II SDRAM Technology... Infiniband Cable Equalizer... Motorola WarpLink Reference Design... OC-48/2.5 Gbps Design Rules... The limits of FR-4... SI & Validation of BLVDS... Gigabit Interconnects... Design of Gigabit Copper Fibre Channel... GTL+ Backplane Termination... GHz Differential Connector ... Timing of SDRAM Design... Transmission Line Skin Effects... MCM Compute Node Thermal Failure... QuickRing Backplane System Bussed Clock Architectures for ATM... Simplifying FutureBus Backplane... Infiniband and the limits... SI Solutions for GTLP... ->A Baker's Dozen...

Abstract LVDS (Low Voltage Differential Signaling) based technology is revolutionizing high-performance backplanes used for multi-point communication in Datacom, Telecom, ISP and Storage applications. It enables quadrupling the bandwidth in many cases while consuming less power and easing termination complexity. The use of a differential technology allows for a reduced voltage swing without compromising noise margins. This enables 100-400+ Mbps multi-point transmission, low bit error rates, live-insertion capability, and a general robustness not available from other single-ended small-swing technologies. This paper provides tips and practical design guidelines for Bus LVDS backplanes. Concepts are supported with design calculations, simulations, and actual hardware measurements. ->This paper is available from NESA for $15.00 to cover management costs. We accept credit card payment for purchase of the papers. The requested paper will be emailed to you shortly after your order is received.

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